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MC74VHC1GT125 Noninverting Buffer / CMOS Logic Level Shifter
with LSTTL-Compatible Inputs
The MC74VHC1GT125 is a single gate noninverting buffer fabricated with silicon gate CMOS technology. It achieves high speed operation similar to equivalent Bipolar Schottky TTL while maintaining CMOS low power dissipation. The MC74VHC1GT125 requires the 3-state control input (OE) to be set High to place the output into the high impedance state. The device input is compatible with TTL-type input thresholds and the output has a full 5 V CMOS level output swing. The input protection circuitry on this device allows overvoltage tolerance on the input, allowing the device to be used as a logic-level translator from 3.0 V CMOS logic to 5.0 V CMOS Logic or from 1.8 V CMOS logic to 3.0 V CMOS Logic while operating at the high-voltage power supply. The MC74VHC1GT125 input structure provides protection when voltages up to 7 V are applied, regardless of the supply voltage. This allows the MC74VHC1GT125 to be used to interface 5 V circuits to 3 V circuits. The output structures also provide protection when VCC = 0 V. These input and output structures help prevent device destruction caused by supply voltage - input/output voltage mismatch, battery backup, hot insertion, etc.
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SC-88A / SOT-353/SC-70 DF SUFFIX CASE 419A
W1d
Pin 1 d = Date Code
TSOP-5/SOT-23/SC-59 DT SUFFIX CASE 483
W1d
* * * * * * * *
Pin 1 d = Date Code
High Speed: tPD = 3.5 ns (Typ) at VCC = 5 V Low Power Dissipation: ICC = 1 mA (Max) at TA = 25C TTL-Compatible Inputs: VIL = 0.8 V; VIH = 2.0 V CMOS-Compatible Outputs: VOH > 0.8 VCC; VOL < 0.1 VCC @Load Power Down Protection Provided on Inputs and Outputs Balanced Propagation Delays Pin and Function Compatible with Other Standard Logic Families Chip Complexity: FETs = 62; Equivalent Gates = 16
FUNCTION TABLE
OE 1 IN A 2 GND 3 4 OUT Y 5 VCC A Input L H X OE Input L L H Y Output L H Z 1 2 3 4 5
PIN ASSIGNMENT
OE IN A GND OUT Y VCC
Figure 1. Pinout (Top View) ORDERING INFORMATION
See detailed ordering and shipping information in the package dimensions section on page 4 of this data sheet.
OE IN A
OUT Y
Figure 2. Logic Symbol
(c) Semiconductor Components Industries, LLC, 2003
1
December, 2003 - Rev. 8
Publication Order Number: MC74VHC1GT125/D
MC74VHC1GT125
MAXIMUM RATINGS (Note 1)
Symbol VCC VIN VOUT IIK IOK IOUT ICC PD qJA TL TJ Tstg VESD DC Supply Voltage DC Input Voltage DC Output Voltage Input Diode Current Output Diode Current DC Output Current, per Pin DC Supply Current, VCC and GND Power Dissipation in Still Air Thermal Resistance Lead Temperature, 1 mm from Case for 10 s Junction Temperature Under Bias Storage Temperature ESD Withstand Voltage Human Body Model (Note 2) Machine Model (Note 3) Charged Device Model (Note 4) Above VCC and Below GND at 125C (Note 5) SC-88A, TSOP-5 SC-88A, TSOP-5 VOUT < GND; VOUT > VCC VCC = 0 High or Low State Characteristics Value -0.5 to +7.0 -0.5 to +7.0 -0.5 to 7.0 -0.5 to VCC + 0.5 -20 +20 +25 +50 200 333 260 +150 -65 to +150 > 2000 > 200 N/A 500 Unit V V V mA mA mA mA mW C/W C C C V
ILatch-Up
Latch-Up Performance
mA
1. Maximum Ratings are those values beyond which damage to the device may occur. Exposure to these conditions or conditions beyond those indicated may adversely affect device reliability. Functional operation under absolute-maximum-rated conditions is not implied. Functional operation should be restricted to the Recommended Operating Conditions. 2. Tested to EIA/JESD22-A114-A 3. Tested to EIA/JESD22-A115-A 4. Tested to JESD22-C101-A 5. Tested to EIA/JESD78
RECOMMENDED OPERATING CONDITIONS
Symbol VCC VIN VOUT TA tr , tf DC Supply Voltage DC Input Voltage DC Output Voltage Operating Temperature Range Input Rise and Fall Time VCC = 5.0 V 0.5 V Characteristics Min 3.0 0.0 0.0 -55 0 Max 5.5 5.5 VCC +125 20 Unit V V V C ns/V
Device Junction Temperature versus Time to 0.1% Bond Failures
Junction Temperature 5C 80 90 100 110 120 130 140 NORMALIZED FAILURE RATE FAILURE RATE OF PLASTIC = CERAMIC UNTIL INTERMETALLICS OCCUR TJ = 110 C TJ = 130 C TJ = 100 C TJ = 120 C TJ = 80 C 100 TIME, YEARS TJ = 90 C
Time, Hours 1,032,200 419,300 178,700 79,600 37,000 17,800 8,900
Time, Years 117.8 47.9 20.4 9.4 4.2 2.0 1.0
1 1 10 1000
Figure 3. Failure Rate vs. Time Junction Temperature
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AC ELECTRICAL CHARACTERISTICS Input tr = tf = 3.0 ns DC ELECTRICAL CHARACTERISTICS
Symbol tPLH, tPHL Symbol tPLZ, tPHZ tPZL, tPZH Cout Cin IOPD IOZ IOPD ICCT ICC IIN VOL VOH VIL VIH Power Dissipation Capacitance (Note 6) Maximum Three-State Output Capacitance (Output in High Impedance State) Maximum Input Capacitance Maximum Output Disable Time,OE to Y (Fi 4 d5) (Figures 4. and 5.) Maximum Output Enable TIme,OE to Y (Figures 4. and 5.) (Fi 4 d5) Parameter Maximum Propagation Delay, A to Y y (Figures 3. and 5.) (Fi 3 d5) Output Leakage Current Maximum 3-State Leakage Current Output Leakage Current Quiescent Supply Current Maximum Quiescent Supply Current Maximum Input Leakage Current Maximum Low-Level Output Voltage g VIN = VIH or VIL Minimum High-Level Output Voltage g VIN = VIH or VIL Maximum Low-Level Input Voltage Minimum High-Level Input Voltage Parameter Input: VIN = 3.4 V Other Input: VCC or GND VIN = VIH or VIL IOH = - 4 mA IOH = - 8 mA VOUT = 5.5 V VIN = VIH or VIL VOUT = VCC or GND VOUT = 5.5 V VIN = VCC or GND VIN = 5.5 V or GND VIN = VIH or VIL IOL = 4 mA IOL = 8 mA VIN = VIH or VIL IOL = 50 mA VIN = VIH or VIL IOH = - 50 mA Test Conditions VCC = 5.0 0.5 V CL = 15pF RL = RI = 500 W CL = 50pF VCC = 3.3 0.3 V CL = 15pF RL = RI = 500 W CL = 50pF VCC = 5.0 0.5 V CL = 15pF RL = RI = 500 W CL = 50pF VCC = 3.3 0.3 V CL = 15pF RL = RI = 500 W CL = 50pF VCC = 5.0 0.5 V CL = 15pF CL = 50pF VCC = 3.3 0.3 V CL = 15pF CL = 50pF Test Conditions
6. CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load. Average operating current can be obtained by the equation: ICC(OPR) = CPD VCC fin + ICC / 4 (per buffer). CPD is used to determine the no-load dynamic power consumption; PD = CPD VCC2 fin + ICC VCC.
CPD
MC74VHC1GT125
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VCC (V) 0 to 5.5 0.0 5.5 0.0 5.5 5.5 3.0 4.5 3.0 4.5 3.0 4.5 3.0 4.5 3.0 4.5 5.5 3.0 4.5 5.5 2.58 3.94 Min 2.9 4.4 1.4 2.0 2.0 Min TA = 25C TA = 25C Typ 0.0 0.0 3.0 4.5 Typ 4.8 7.0 6.5 8.0 3.6 5.1 5.4 7.9 3.8 5.3 5.6 8.1 6 4 0.10 0.25 1.35 0.36 0.36 0.53 0.8 0.8 Max 9.7 13.2 Max 8.0 11.5 8.0 11.5 0.5 0.5 1.0 0.1 0.1 6.8 8.8 5.1 7.1 5.5 7.5 10 Typical @ 25C, VCC = 5.0 V 2.48 3.80 Min Min 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 2.9 4.4 1.4 2.0 2.0 TA 85C TA 85C 1.0 2.5 8.0 10.0 9.5 13.0 9.5 13.0 Max 1.50 0.44 0.44 0.53 0.8 0.8 Max 11.5 15.0 6.0 8.0 6.5 8.5 5.0 5.0 0.1 0.1 10 20IIII40 14 -55 TA 125C -55 TA 125C 2.34 3.66 Min Min 2.9 4.4 1.4 2.0 2.0 1.0 2.5 11.5 15.0 8.5 10.5 10.0 12.0 14.5 18.0 12.0 16.0 Max 1.65 0.52 0.52 0.53 0.8 0.8 Max 7.5 9.5 0.1 0.1 10 10 10 Unit ns Unit mA mA mA mA mA mA pF pF pF ns ns V V V V
3
MC74VHC1GT125
SWITCHING WAVEFORMS
OE VCC GND tPZL Y 50% VCC tPZH Y 50% VCC tPHZ tPLZ HIGH IMPEDANCE VOL + 0.3V VOH - 0.3V HIGH IMPEDANCE
A tPLH
50% tPHL 50% VCC
VCC GND
50%
Y
Figure 4. Switching Waveforms
Figure 5.
TEST POINT OUTPUT DEVICE UNDER TEST CL* DEVICE UNDER TEST
TEST POINT OUTPUT 1 kW CONNECT TO VCC WHEN TESTING tPLZ AND tPZL. CONNECT TO GND WHEN TESTING tPHZ AND tPZH.
CL *
*Includes all probe and jig capacitance
*Includes all probe and jig capacitance
Figure 6. Test Circuit
Figure 7. Test Circuit
INPUT
Figure 8. Input Equivalent Circuit
DEVICE ORDERING INFORMATION
Device Nomenclature Device Order Number MC74VHC1GT125DF1 MC74VHC1GT125DF2 MC74VHC1GT125DT1 Circuit Indicator MC MC MC Temp Range Identifier 74 74 74 Device Function T125 T125 T125 Package Suffix DF DF DT Tape & Reel Suffix 1 2 1 Package Type (Name/SOT#/ Common Name) SC-88A / SOT-353 / SC-70 SC-88A / SOT-353 / SC-70 TSOPS / SOT-23 / SC-59 Tape and Reel Size 178 mm (7") 3000 Unit 178 mm (7") 3000 Unit 178 mm (7") 3000 Unit
Technology VHC1G VHC1G VHC1G
For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D.
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MC74VHC1GT125
CAVITY TAPE
TOP TAPE
TAPE TRAILER (Connected to Reel Hub) NO COMPONENTS 160 mm MIN
COMPONENTS DIRECTION OF FEED
TAPE LEADER NO COMPONENTS 400 mm MIN
Figure 9. Tape Ends for Finished Goods
TAPE DIMENSIONS mm 2.00 4.00 4.00 1.50 TYP 1.75
8.00 $0.30
3.50 $0.50
1 1.00 MIN DIRECTION OF FEED
Figure 10. SC-70-5/SC-88A/SOT-353 DF1 Reel Configuration/Orientation
TAPE DIMENSIONS mm 2.00
4.00 4.00 1.50 TYP 1.75
8.00 $0.30
3.50 $0.50
1 1.00 MIN DIRECTION OF FEED
Figure 11. SC-70/SC-88A/SOT-353 DF2 and SOT23-5/TSOP-5/SC59-5 DT1 Reel Configuration/Orientation
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MC74VHC1GT125
t MAX
1.5 mm MIN (0.06 in) 20.2 mm MIN (0.795 in)
13.0 mm $0.2 mm (0.512 in $0.008 in)
A
50 mm MIN (1.969 in)
FULL RADIUS
G
Figure 12. Reel Dimensions
REEL DIMENSIONS
Tape Size 8 mm T and R Suffix 1, 2 A Max 178 mm (7 in) G 8.4 mm, + 1.5 mm, -0.0 (0.33 in + 0.059 in, -0.00) t Max 14.4 mm (0.56 in)
DIRECTION OF FEED
BARCODE LABEL POCKET HOLE
Figure 13. Reel Winding Direction
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MC74VHC1GT125
PACKAGE DIMENSIONS
A G
SC70-5/SC-88A/SOT-353 DF SUFFIX 5-LEAD PACKAGE CASE 419A-02 ISSUE G
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. 419A-01 OBSOLETE. NEW STANDARD 419A-02. 4. DIMENSIONS A AND B DO NOT INCLUDE MOLD FLASH, PROTRUSIONS, OR GATE BURRS. INCHES MIN MAX 0.071 0.087 0.045 0.053 0.031 0.043 0.004 0.012 0.026 BSC --- 0.004 0.004 0.010 0.004 0.012 0.008 REF 0.079 0.087 MILLIMETERS MIN MAX 1.80 2.20 1.15 1.35 0.80 1.10 0.10 0.30 0.65 BSC --- 0.10 0.10 0.25 0.10 0.30 0.20 REF 2.00 2.20
5
4
S
1 2 3
-B-
D 5 PL
0.2 (0.008)
M
B
M
N J
DIM A B C D G H J K N S
K
SOLDERING FOOTPRINT*
0.50 0.0197
0.65 0.025 0.65 0.025 0.40 0.0157
SCALE 20:1 mm inches
1.9 0.0748
Figure 14. SC-88A/SC70-5/SOT-353
*For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.
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MC74VHC1GT125
PACKAGE DIMENSIONS
SOT23-5/TSOP-5/SC59-5 DT SUFFIX 5-LEAD PACKAGE CASE 483-01 ISSUE C
4 2 3
D
5 1
S
B
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH THICKNESS. MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF BASE MATERIAL. 4. A AND B DIMENSIONS DO NOT INCLUDE MOLD FLASH, PROTRUSIONS, OR GATE BURRS. MILLIMETERS INCHES DIM MIN MAX MIN MAX A 2.90 3.10 0.1142 0.1220 B 1.30 1.70 0.0512 0.0669 C 0.90 1.10 0.0354 0.0433 D 0.25 0.50 0.0098 0.0197 G 0.85 1.05 0.0335 0.0413 H 0.013 0.100 0.0005 0.0040 J 0.10 0.26 0.0040 0.0102 K 0.20 0.60 0.0079 0.0236 L 1.25 1.55 0.0493 0.0610 M 0_ 10 _ 0_ 10 _ S 2.50 3.00 0.0985 0.1181
L G A J C 0.05 (0.002) H K M
SOLDERING FOOTPRINT*
1.9 0.074
0.95 0.037
2.4 0.094 1.0 0.039 0.7 0.028
SCALE 10:1 mm inches
Figure 15. THIN SOT23-5/TSOP-5/SC59-5
*For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.
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PUBLICATION ORDERING INFORMATION
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MC74VHC1GT125/D

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